TraceMaker
C++ API of the engine
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escape_flow.hpp
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1// SPDX-License-Identifier: GPL-3.0-or-later
2#pragma once
3// Escape planning, version 2 (roadmap M9; design doc 05 §3 and §14): min-cost-flow channel assignment for deep
4// ball-grid arrays, layer by layer.
5//
6// Version 1 (escape.hpp) sends perimeter pins straight out and every inner ball to a fixed dog-bone via site. In
7// an array deeper than two rings that leaves the channels between balls unassigned: which inner ball uses which
8// gap, on which layer, is decided by whichever net's search runs first. Here each deep array gets the
9// network-flow escape model with diagonal capacities (Yan & Wong, "A correct network flow model for escape
10// routing", DAC 2009): the square gaps between four balls are graph nodes, the gap between two neighbouring balls
11// is an edge whose capacity is the number of tracks that fit there, and every gap node carries a capacity from its
12// diagonals, which every track turning in or crossing the gap must pass (we take the narrower diagonal for both,
13// which is conservative). A min-cost max flow from the balls to the outside of the array gives each escaping ball
14// a channel sequence. Layers are assigned one after another, as in the layer-by-layer escape of Ozdal & Wong
15// ("Algorithms for simultaneous escape routing and layer assignment of dense PCBs", TCAD 2006) and Lin et al.
16// (DAC 2021): the pad layer first; the balls that cannot leave on it get a
17// dog-bone via site (an assignment, also by min-cost flow, to interstitial sites no pad-layer escape crosses);
18// then each further layer routes the remaining vias out between the via sites, which are that layer's obstacles.
19//
20// The result is a set of corridors the router reserves exactly as version 1's: reservations only remove options
21// from other nets, every commit is still checked exactly, so the plan cannot create violations. Integer costs,
22// pads and layers in board order and fixed arc order make it deterministic.
23#include <functional>
24#include <vector>
25
26#include "route/escape.hpp"
27
28namespace tmk::route {
29
31 // Planning rules per net (the router's class width, clearance and via diameter). An array is planned with the
32 // most common values among its pins (ties: the narrower), so one power net does not shrink every channel.
34 std::function<Coord(model::NetId)> keep; // corridor band, as for version 1 (track width + clearance)
35 // Optional checks against fixed copper (absent: geometry of the array alone). track_free(layer, p, net): a
36 // track of that net's planning width centred at p is clear of fixed copper on `layer`; via_free(p, net): that
37 // net's via fits at p.
38 std::function<bool(int, geom::Point, model::NetId)> track_free;
39 std::function<bool(geom::Point, model::NetId)> via_free;
40 int layers = 2; // copper layers of the board
41};
42
43// Per ring (1 = perimeter) of the planned arrays: how the pins that need routing were assigned.
44struct RingPlan {
45 int pins = 0;
46 int pad_layer = 0; // escape on the pad layer through planned channels
47 int other_layer = 0; // dog-bone via, then planned channels on another layer
48 int via_only = 0; // dog-bone via site, but no layer had room to leave the array
49 int none = 0; // no channel and no via site
50};
52 int arrays = 0;
53 std::vector<RingPlan> rings; // index 0 = ring 1
54 std::vector<int> per_layer; // escapes planned per copper layer
55};
56
57// Deep arrays: SMD pads of one footprint on a regular square grid (every pad within pitch / 8 of a grid point,
58// at most one pad per point, at least 30 % of the points populated, at least 5 x 5) with at least one pin that
59// needs routing in the third ring or deeper. Pads larger than the pitch (thermal pads) are left to the fixed
60// copper checks. ring_of(pad) is the pad's ring (1 = perimeter) for pads of deep arrays, 0 otherwise.
61std::vector<int> array_rings(const model::Board& b, const std::vector<char>& needs, const EscapeOptions& o = {});
62
63// Plans the deep arrays by min-cost flow and every other dense package as version 1 does (plan_escapes).
64std::vector<EscapeCorridor> plan_escapes_flow(const model::Board& b, const std::vector<char>& needs, const FlowEscapeInput& in,
65 const EscapeOptions& o = {}, FlowEscapeStats* stats = nullptr);
66
67} // namespace tmk::route
Escape (fanout) planning, version 1 (roadmap M9; design doc 05 §3).
std::int32_t NetId
0 = no net
Definition board.hpp:21
std::vector< EscapeCorridor > plan_escapes_flow(const model::Board &b, const std::vector< char > &needs, const FlowEscapeInput &in, const EscapeOptions &o={}, FlowEscapeStats *stats=nullptr)
Plans the deep arrays by min-cost flow and every other dense package as version 1 does (plan_escapes)...
std::vector< int > array_rings(const model::Board &b, const std::vector< char > &needs, const EscapeOptions &o={})
Deep arrays: SMD pads of one footprint on a regular square grid (every pad within pitch / 8 of a grid...
std::int64_t Coord
Engine coordinate: signed 64-bit nanometres.
Definition units.hpp:12
std::function< bool(geom::Point, model::NetId)> via_free
std::function< bool(int, geom::Point, model::NetId)> track_free
Optional checks against fixed copper (absent: geometry of the array alone).
std::function< Coord(model::NetId)> keep
corridor band, as for version 1 (track width + clearance)
std::function< Coord(model::NetId)> clearance
int layers
copper layers of the board
std::function< Coord(model::NetId)> via
std::function< Coord(model::NetId)> width
Planning rules per net (the router's class width, clearance and via diameter).
std::vector< int > per_layer
escapes planned per copper layer
std::vector< RingPlan > rings
index 0 = ring 1
Per ring (1 = perimeter) of the planned arrays: how the pins that need routing were assigned.
int pad_layer
escape on the pad layer through planned channels
int none
no channel and no via site
int other_layer
dog-bone via, then planned channels on another layer
int via_only
dog-bone via site, but no layer had room to leave the array