D82 — Router applies positional disallow rules¶
Decision¶
The router applies position-, size- and footprint-dependent disallow track/via rules to every new track and via as the DRC judges board items (all rules in order on the actual copper, a via's span telling blind from buried). The exact checks block such copper. The lattice search treats the rules like fixed copper (blocked on the track's copper, "tight" within the margin), outside the per-class caches. Per-net masks stay for position-independent rules.
Alternatives¶
Keep them DRC-only with a warning (D80); rasterise each rule into per-net lattice masks; fold the verdict into the per-class obstacle codes; a three-valued static evaluation so that positional ignore rules also widen the per-net masks
Reason¶
Rule 6: the board owner's rules are not to be routed through. Judging the same copper with the same evaluator keeps router and DRC in agreement. Rules may name nets inside one class, so the class codes cannot hold them, and masks per net would multiply the lattice memory. Boards without such rules route byte-identically (quick, mid and planes tiers). Eight PCBench boards with "no vias under ICs" and "bottom clear under front ICs": KiCad items_not_allowed 476 → 0, at the price of completion where the rules close a pin's only exits: mean 97.6 % → 88.8 % at 3M work (doc 05 §34)