TraceMaker
C++ API of the engine
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Class Hierarchy
This inheritance list is sorted roughly, but not completely, alphabetically:
[detail level 123]
 Ctmk::advice::Advice
 Ctmk::route::RouterOptions::AdviceSetHints from an advice file (src/advice, doc 17)
 Ctmk::advice::AdvisorOptions
 Ctmk::advice::AliasMapAliases for net names and part references (a redacted stuck report): the advice an advisor writes uses the aliases, and unalias puts the board's names back before the references are checked
 Ctmk::place::detail::Annealer
 Ctmk::place::AnnealOptions
 Ctmk::place::AnnealResult
 Ctmk::advice::AppliedWhat the router is given for an advice file, and what each hint became (for the log, the summary and the viewer)
 Ctmk::model::ArcTrack
 Ctmk::model::Board
 Ctmk::io::BoardEditor
 Ctmk::learn::BoardFeatures
 Ctmk::crules::BoardIndex
 Ctmk::model::BoardMinimums
 Ctmk::geom::Box
 Ctmk::model::Box
 Ctmk::place::Box
 Ctmk::route::BundleConn
 Ctmk::route::BundleHooks
 Ctmk::route::BundleOptions
 Ctmk::route::BundleStats
 Ctmk::route::RouterOptions::BusBuses (doc 05 §38): groups of nets routed lane by lane
 Ctmk::route::BusGroup
 Ctmk::route::BusMemberA group as routed, measured on copper
 Ctmk::route::BusStats
 Ctmk::place::Candidate
 Ctmk::crules::Catalogue
 Ctmk::crules::Category
 Ctmk::place::CongestionMap
 Ctmk::place::CongestionOptions
 Ctmk::route::Connection
 Ctmk::passes::ConnectionStyleOne connection: copper of one net from one end to the next
 Ctmk::drc::Connectivity
 Ctmk::route::ConnRouteThe copper of one routed connection, keyed by its two pads: what a later run can start from (RouterOptions::warm)
 Ctmk::model::ConstraintOne constraint inside a custom rule, e.g. (constraint clearance (min 0.2mm))
 Ctmk::advice::Consulted
 Ctmk::drc::CopperItem
 Ctmk::drc::CopperModel
 Ctmk::place::CopperShapeA piece of copper with what KiCad's clearance check needs: layers, net and the clearance it asks for (its net class, local overrides and board minimum; pair clearance = max of the two)
 Ctmk::server::ViewerServer::Counters
 Ctmk::drc::CourtyardCache
 Ctmk::drc::CourtyardEntry
 Ctmk::drc::CourtyardRegion
 Ctmk::crules::CriticalNet
 Ctmk::crules::CriticalRoleThe table itself, for the docs and the tests: (category id, role, tier)
 Ctmk::crules::CurrentPlanWidth for a rule that names a current (doc 15 §5.4, IPC-2221)
 Ctmk::model::Pad::CustomPrimCustom-pad primitives in the pad frame, each already grown by half its stroke width (KiCad draws them with a round pen and fills them): a polygon or rectangle, a polyline (line, arc) or a disc (circle; pts[0] is the centre)
 Ctmk::model::CustomRule
 Ctmk::route::CutLineA straight line across the whole board and what has to cross it (escalation rung R6, doc 05 §20; the cut argument of Maley, "Single-Layer Wire Routing and Compaction", 1990, at the resolution of the capacity samples)
 Ctmk::route::DeadPinEscape feasibility (M9 analysis): can each pin of a dense package leave it at all under the board's rules?
 Ctmk::crules::DecapTieDecision D25 (doc 04 §2): a two-pad capacitor (C*) between a supply net and a ground net is tied to the nearest pad, in the input placement, of an IC (U*, IC*) on the same supply; ties keep the lowest pad index
 Ctmk::model::DesignRules
 Ctmk::crules::Detection
 Ctmk::crules::Detector
 Ctmk::gpu::DeviceInfo
 Ctmk::model::DielectricGapThe dielectric between two adjacent copper layers, combined over every stackup layer between them
 Ctmk::route::Dir2Octilinear unit direction d (0..7, E, NE, N, NW, W, SW, S, SE with y down) and its left normal, as doubles
 Ctmk::sexpr::Document
 Ctmk::drc::DrcOptions
 Ctmk::drc::DrcReport
 Ctmk::place::EcoMemoryFailure memory (doc 04 §4 step 4): moves already routed without improvement, by part, target and rotation
 Ctmk::place::EcoOptions
 Ctmk::place::EcoResult
 Ctmk::crules::EdgeAttractionConnector edge pull for the placer (doc 15 §5.2 edge; CONN-01, USB2-11, DISP-02), opt-in (tracemaker-place –edge-attraction): the anchor of every instance with a connector edge rule (mode soft/on, not advisory, not disabled by the user), once per footprint, never a locked part and never a pin header or socket (board-to-board and jumper headers, CONN-01 note)
 Ctmk::place::EdgePullAn objective-only pull of a part toward the board outline (doc 15 CONN-01, opt-in): the body point nearest to the outline in the input becomes a one-pin pseudo-net anchored on the nearest outline segment's axis (x for a mostly vertical segment, y for a mostly horizontal one), so the pull is exact in the annealer's integer cost and rotating the part away from the edge costs too
 Ctmk::crules::EffectiveRule
 Ctmk::app::tui::EntryOne line of an options file: name = value
 Ctmk::route::EscapeAnalysisOptions
 Ctmk::route::EscapeCorridor
 Ctmk::route::EscapeOptions
 Ctmk::route::EscapeStats
 Ctmk::crules::Evaluation
 Cstd::exceptionSTL class
 Ctmk::place::ExtractOptions
 Ctmk::learn::FailedConnection
 Ctmk::place::RouteEval::Failure
 Ctmk::server::Failure
 Ctmk::app::tui::FieldOne command-line option as the screen shows it
 Ctmk::gpu::FieldProblem
 Ctmk::route::FlowEscapeInput
 Ctmk::route::FlowEscapeStats
 Ctmk::model::Footprint
 Ctmk::analysis::FootprintCheckOptions
 Ctmk::analysis::FootprintCheckReport
 Ctmk::analysis::FootprintIssue
 Ctmk::analysis::FootprintRef
 Ctmk::analysis::FootprintResult
 Ctmk::crules::GeneratedKeepoutKeep-out rule areas (doc 15 §5.5, P2) for instances at confidence >= apply: crystal + load caps (XTAL-04), switching-regulator inductor (BUCK-06/BOOST-04), discrete Ethernet magnetics (ETH-05: tracks, vias and zones on the magnetics' side and the adjacent layer only)
 Ctmk::route::GlobalNet
 Ctmk::route::GlobalOptions
 Ctmk::route::GlobalResult
 Ctmk::gpu::GpuStatus
 Ctmk::model::Graphic
 Ctmk::route::RouterOptions::GuidePathPath guidance (doc 16 F1): a preferred path for a connection, found by matching its two pad centres
 Ctmk::route::HeatGrid
 Ctmk::drc::Hole
 Ctmk::crules::ImpedancePlan
 Ctmk::crules::Instance
 Ctmk::drc::ItemGraphKiCad 10's item graph (pcbnew/connectivity, CN_VISITOR): items of any nets are linked when their copper touches on a common layer, except two items that cannot change net (pads, zone fills, free vias) on different nets
 Ctmk::place::Keepout
 Ctmk::learn::KnowledgeBase
 Ctmk::model::LayerDef
 Ctmk::crules::LayerDelayPropagation delay per copper layer used to turn ps skew budgets into mm (doc 15 §4): from the stackup (eps_eff of a 50 ohm line on outer layers, er on inner layers) or the catalogue's FR-4 defaults
 Ctmk::crules::LayerGeometryOne copper layer's line geometry from the stackup
 Ctmk::route::LayerLimits
 Ctmk::place::LegaliseStats
 Ctmk::place::Legality
 Ctmk::route::LegalizeOptions
 Ctmk::route::LegalizeResult
 Ctmk::app::tui::LineOne screen line: text is the plain text (what a test or a monochrome terminal sees), spans the same in pieces with their styles
 Ctmk::crules::imp::Line
 Ctmk::crules::LineSolutionThe width (and gap) that meets one target on one layer
 Ctmk::place::LnsResultLarge-neighbourhood search from start (legal): windows LNS windows (sizes and seeds from o; the stream is o.seed)
 Ctmk::io::LoadedBoard
 Ctmk::place::LoopOptions
 Ctmk::place::LoopResult
 Ctmk::crules::Measure
 Ctmk::place::Metrics
 Ctmk::place::MinCostFlowMin-cost flow on a small graph (exposed for tests)
 Ctmk::app::tui::Model
 Ctmk::place::detail::Move
 Ctmk::model::Net
 Ctmk::model::NetClass
 Ctmk::model::Netlist
 Ctmk::model::NetlistComponent
 Ctmk::model::NetlistNet
 Ctmk::model::NetlistNode
 Ctmk::analysis::NetReturn
 Ctmk::sexpr::Node
 Ctmk::route::Obstacles
 Ctmk::crules::OverrideEntry
 Ctmk::crules::Overrides
 Ctmk::model::Pad
 Ctmk::place::PadAffinityA design-intent pseudo-net between two board pads (doc 15 P1): pad_a belongs to the part that should sit near pad_b (an ESD part near its connector, a crystal near its IC's oscillator pins, ...)
 Ctmk::crules::imp::Pair
 Ctmk::route::PairRuleWhat a pair is routed at
 Ctmk::route::PairStatsA routed pair, measured on its tracks: a sample of one half counts as coupled where a parallel track of the other half on the same layer lies within coupled_gap edge to edge
 Ctmk::place::Part
 Ctmk::route::PartEscape
 Ctmk::place::PartGeom
 Ctmk::server::PathPoint
 Ctmk::place::Pin
 Ctmk::place::Placement
 Ctmk::crules::PlacementAffinityPlacement pseudo-nets for every applicable proximity rule (mode soft or on; confidence >= suggest)
 Ctmk::place::PlaceOptions
 Ctmk::place::PlaceReport
 Ctmk::place::PNet
 Ctmk::analysis::detail::Point
 Ctmk::crules::Point
 Ctmk::geom::Point
 Ctmk::model::Point
 Ctmk::place::Point
 Ctmk::route::Point
 Ctmk::geom::Polygon
 Ctmk::geom::PolygonIndex
 Ctmk::route::PortfolioResultRuns several differently configured routers (portfolio variants) and keeps the best result
 Ctmk::place::Problem
 Ctmk::advice::ProcessResult
 Ctmk::crules::ProximityPairsA proximity rule bound to pads (doc 15 §4 proximity): each pair is (pad of the part that should move close, pad it should be close to)
 Ctmk::analysis::detail::Pt
 Ctmk::place::RasterConservative occupancy raster per side (cell 0.05–0.1 mm)
 Ctmk::server::RatsEdge
 Ctmk::route::ReferenceMap
 Ctmk::drc::RefillResult
 Ctmk::analysis::RefLibrary
 Ctmk::analysis::RefPad
 Ctmk::advice::Region
 Ctmk::analysis::detail::RegionThe reference copper of one layer: the region under the non-zero rule (islands with their holes)
 Ctmk::session::Session::ReplayRuns the calls of a log written by SessionOptions::log and stops at the first result or state digest that differs
 Ctmk::server::ReplayReader
 Ctmk::server::ReplayWriter
 Ctmk::analysis::ReturnEnd
 Ctmk::analysis::ReturnLayerChange
 Ctmk::passes::StitchOptions::ReturnNetReturn-path stitching: every via of signal wants a via (or plated through-hole pad) of plane within distance, centre to centre
 Ctmk::analysis::ReturnPathOptions
 Ctmk::analysis::ReturnPathReport
 Ctmk::analysis::ReturnVoid
 Ctmk::route::RingPlanPer ring (1 = perimeter) of the planned arrays: how the pins that need routing were assigned
 Ctmk::RngStreamA random stream identified by (seed, stage, item)
 Ctmk::crules::Role
 Ctmk::place::RouteEvalWhat the router reports for one placement
 Ctmk::app::RouteJob
 Ctmk::app::RouteJobResult
 Ctmk::route::Router
 Ctmk::route::RouteResult
 Ctmk::route::RouterOptions
 Ctmk::drc::RuleEngineCompiled custom-rule condition
 Ctmk::crules::RuleOverrideWhat the user override file (doc 15 §6.3) changed for one rule of one instance
 Ctmk::crules::RuleSpec
 Ctmk::place::Seg
 Ctmk::server::ServerOptions
 Ctmk::session::Session
 Ctmk::session::SessionOptions
 Ctmk::geom::Shape
 Ctmk::place::Shape
 Ctmk::events::Sink
 Ctmk::place::detail::SlotTemperature slot: the temperature and the shift-radius adaptation that belongs to it (parallel tempering exchanges slots between replicas, so a replica arriving at a temperature inherits its tuned radius)
 Ctmk::crules::imp::Solved
 Ctmk::app::tui::Span
 Ctmk::place::SpreadStats
 Ctmk::io::SrjBoardFiles
 Ctmk::io::SrjConnection
 Ctmk::io::SrjExport
 Ctmk::io::SrjImportOptions
 Ctmk::io::SrjNetOne electrical net: the connections and obstacles that tscircuit's connectivity map (lib/utils/getConnectivityMapFromSimpleRouteJson.ts) puts in one group
 Ctmk::io::SrjObstacle
 Ctmk::io::SrjPlaneA bus whose termination is a plane: every connection of the bus ends in a plane on layer
 Ctmk::io::SrjPoint
 Ctmk::io::SrjProblem
 Ctmk::io::SrjRules
 Ctmk::model::Stackup
 Ctmk::model::StackupLayer
 Ctmk::server::Stats
 Ctmk::passes::StitchOptions
 Ctmk::passes::StitchResult
 Ctmk::passes::StitchReturn
 Ctmk::advice::StuckInput
 Ctmk::advice::StuckReport
 Ctmk::passes::StyleOptions
 Ctmk::passes::StyleReport
 Ctmk::crules::SyntheticClassNet classes from rules (doc 15 §5.3-5.4 and §16, P5): impedance rules with a computed width/gap, and width rules with a current or a minimum width, become synthetic net classes for the nets bound to the rule's roles
 Ctmk::passes::WidenOptions::TargetWidth targets by net (explicit options and component rules); a target below a track's width changes nothing
 Ctmk::model::Text
 Ctmk::model::Track
 Ctmk::analysis::TrustedBrandsBrands whose datasheets are trusted
 Ctmk::route::TunnelStatsPackage tunnels (doc 05 §52): a connection between two perimeter pins of one dense package on the same net (the core rail's three pins, the supply pins of a package) goes where the designer puts it: a short stub and a via straight out of each pin, and the run between the two vias on the other layer, under the package
 Ctmk::U32x2
 Ctmk::U32x4
 Ctmk::index::UniformGrid
 Ctmk::drc::UnionFind
 Ctmk::route::RouteResult::UnroutedOne unrouted connection of the state returned, structured for the stuck report (doc 17 §3): where it is, why the last attempt failed (a code, and the search's own words), how often it was ripped or failed, and which nets stood in the way
 Ctmk::model::Via
 Ctmk::route::ViaHeightsThe length a via adds to its net in KiCad's length calculation, which its skew check uses (KiCad 10, BOARD_STACKUP::GetLayerDistance): the stackup between the two copper layers the via joins, with the copper of an outer layer in full and of an inner layer by half
 Ctmk::drc::Violation
 Ctmk::drc::ViolationItem
 Ctmk::place::ViolationsEvery conflict in a placement (for the final report and tests): movable-involved pairs and parts outside
 Ctmk::passes::WidenNet
 Ctmk::passes::WidenOptions
 Ctmk::passes::WidenResult
 Ctmk::place::WindowResultExact window (doc 04 §3 F, without CP-SAT): the best placement of parts (others fixed) over a candidate set per part (its own spot, the other window parts' spots, its HPWL-optimal spot; four rotations each), by branch and bound with an HPWL bound
 Ctmk::place::detail::WindowStats
 Ctmk::route::WorkCountsWork profile (doc 10 §2, D88): how many of each costly operation a run did, per phase
 Ctmk::route::WorkProfile
 Ctmk::model::Zone
 Ctmk::drc::ZoneFillsEdge buckets of every zone fill (geom::PolygonIndex), so the zone questions below cost the nearby edges only