wholeboard.kicad.dru

A KiCad custom-rules file (.kicad_dru) with JLCPCB's manufacturing limits.

The project's design settings only hold KiCad's basic minimums. The rules file adds the ones JLCPCB states for the board's layer count: annular rings, hole spacing, hole to copper, silkscreen to pads, silkscreen text size, copper to the board edge and the drill aspect ratio. The values live in jlc/capabilities.json.

Also finds the features JLCPCB charges extra for (small vias, vias in pads), for the quote.

limits(layers, thickness_mm=1.6)

JLCPCB's limits for a board, merged into one dict.

text(layers, thickness_mm=1.6, edge_clearance_mm=None)

The .kicad_dru file's contents.

cost_features(geo, layers)

The board's features that JLCPCB charges extra for (or cannot make): small vias and vias in pads.