Interface profiles

Generated from the code

This page is written from wholeboard/impedance.py each time the site is built. To change it, change the code.

An impedance entry in the design can name a profile; the profile supplies the interface's limits and the entry's own fields override them. The post-routing check reads them.

Profile	Interface	Kind	Ω	Max length (mm)	Max skew in pair (mm)	Max match across bus (mm)	Max vias	Max stub (mm)
usb2_hs	USB 2.0 high speed (480 Mbit/s)	diff	90	150	1.25	–	2	2.5
usb2_fs	USB 2.0 full speed (12 Mbit/s)	diff	90	–	5	–	4	10
ethernet_100	100BASE-TX pair	diff	100	100	1.27	–	2	2.5
rmii	RMII (50 MHz)	bus	–	100	–	25	3	–
qspi_flash	QSPI flash	bus	–	30	–	5	2	–
rf_50	50 Ω RF feed	single	50	25	–	–	0	1

Stack-ups

Trace widths are worked out for the outer layer over the nearest plane:

Layers	Stack-up	Dielectric height (mm)	εr
2	2-layer FR-4	board thickness	4.5
4	JLC04161H-7628	0.2104	4.4
6	JLC06161H-2116	0.1164	4.16

What the designer is told

A design lists its controlled nets in "impedance":
  [{"nets": ["USB_DP", "USB_DN"], "ohms": 90, "kind": "diff", "max_skew_mm": 1.25},
   {"nets": ["RF_ANT"], "ohms": 50, "kind": "single"},
   {"nets": ["QSPI_SCLK", "QSPI_SD0"], "kind": "bus", "max_length_mm": 30, "max_match_mm": 5}]

An entry may name a routing profile ("profile": "usb2_hs") for an interface's limits; its own fields override
the profile's. Limits: max_length_mm (each net), max_skew_mm (within a pair), max_match_mm (between the nets of
a bus), max_vias (each net), max_stub_mm (a branch off the main run, e.g. to an ESD diode), and match with
max_skew_between_mm (pairs that share a "match" name stay within that length of each other). Profiles: usb2_hs, usb2_fs, ethernet_100, rmii, qspi_flash, rf_50.
Building blocks carry the profile of the interfaces they provide, so the checks apply wherever they are used.

Widths use the IPC-2141 microstrip formulas for an outer-layer trace over the nearest plane. They are
approximate (the coupled-pair formula most of all): order 4 and 6 layer boards with impedance control and
the stack-up named here (free at JLCPCB), and check the figures in JLCPCB's impedance calculator.