wholeboard.sim¶
Simulate a design spec with ngspice and check the circuit against its parts' ratings.
Every component gets a SPICE model chosen from its reference, symbol, value, part number and JLCPCB description: resistors, capacitors, inductors, LEDs (forward voltage from the colour or the datasheet range), diodes, zeners, TVS, BJTs, MOSFETs, slide switches, linear regulators (with dropout, current limit and heat), switching regulators (as averaged power converters), 555 timers, op-amps and comparators. Other ICs become loads on their supply pins with typical and peak currents (an ESP32 draws ~80 mA and peaks at ~350 mA during Wi-Fi transmit).
Supplies come from the spec's "simulation" section, or are guessed from connectors, batteries and net names. The simulation runs an operating point (typical and peak loads), a transient (start-up, oscillators, signals) and optionally an AC sweep, then reports: - rail voltages and supply currents, against the supply's rating, and battery life, - per-part current, voltage, power and temperature against the part's rating, - regulator dropout, input range and IC supply ranges, - oscillator frequency and duty cycle on every net that toggles, - the AI's own expectations ("OUT blinks at 0.8 to 1.2 Hz").
Netlist
¶
parse_value(text)
¶
'4k7' -> 4700, '100nF' -> 1e-7, '470R' -> 470, '2.2uH' -> 2.2e-6, '1M' -> 1e6.
net_volts(name)
¶
Voltage implied by a net name: '+3V3' -> 3.3, '+5V' -> 5, 'VCC_12V' -> 12, 'VBUS' -> 5.
facts(text)
¶
Ratings in a JLCPCB/LCSC description: volts, amps, watts, LED Vf range, wavelength, dropout.
simulate(spec, out_dir, cfg=None, engine=None, part_info=None, log=print, cancel=None)
¶
Build the netlist, run ngspice and check the results. Never raises for circuit problems.